1. Field of the Invention
The present invention relates generally to the fabrication of circuit boards. More particularly, the present invention relates to a solder pad structure for printed circuit boards and fabrication method thereof.
2. Description of the Prior Art
Rapid changes in the semiconductor industry will continue toward higher functionality that leads to higher I/O counts, pushing packaging towards new, smaller, and higher density architectures. The semiconductor industry has developed features of 30 nm for high performance microprocessors. However, the feature size that the packaging industry can produce is about 15˜20 μm. A huge technical gap exists between semiconductor and packaging. In order to keep pace with semiconductor process development, a process for finer pitch wiring substrate is necessary.
FIG. 1 to FIG. 5 demonstrate a conventional solder resist process and the solder paste printing process after the solder resist process. As shown in FIG. 1, a surface wiring structure 1a is formed on a surface of the circuit board 1. The surface wiring structure 1a includes a plurality of solder pad structures 2 and fine trace 3. For the sake of simplicity, the conductive via holes or other inner layer interconnection are not shown in the figures.
As shown in FIG. 2, after the formation of the surface wiring structure 1a, a solder resist layer 4 is formed to cover the surface of the circuit board 1. Typically, the solder resist layer 4 is composed of photo-sensitive polymers or inks, and the solder resist layer 4 may be liquid type or solid film type. It is well known that the solder resist layer 4 is used to protect the circuit wires that are not covered with tin and prevent solder from bridging between conductive traces, thereby preventing short circuits.
As shown in FIG. 3, after coating the solder resist layer 4, a conventional photolithographic process including exposure and development is carried out to form a plurality of solder resist openings 4a in the solder resist layer 4. Each of the solder resist openings 4a exposes a portion of each of the underlying solder pad structures 2.
As shown in FIG. 4, prior to the formation of electroless nickel/immersion gold (ENIG), a chemical micro-etching and cleaning process is performed to remove the oxide residuals formed on the exposed surface of the solder pad structures 2 from the solder resist openings 4a. However, this cleaning process results in undercut defects 4b at the bottom of the solder resist openings 4a. 
Subsequently, as shown in FIG. 5, a conventional electroless nickel/immersion gold (ENIG) process is carried out to form an ENIG surface finish layer 5 having a thickness of about 0.5-1.5 micrometers on the exposed top surface of the solder pad structures 2 within the solder resist openings 4a. A conventional solder paste printing process is then performed to fill the solder resist openings 4a with solder paste 6. Thereafter, the circuit board 1 is subjected to reflow and pressing processes.
However, the above-described prior art method has several drawbacks. First, the yield of the solder paste printing process reduces as the pitch between the solder pad structures 2 on the flip-chip side of the circuit board becomes smaller and smaller. Second, the adhesion of solder paste 6 to the solder resist layer 4 is poor. Third, the undercut defects 4b formed during the chemical micro-etching and cleaning process create high stress points in the subsequent processes leading to reliability problems of the circuit board. In light of the above, there is a strong need in this industry to provide an improved method for fabricating a circuit board that is capable of solving the shortcomings and problems of the prior art.